There are many integrated circuit chips in the mobile phone for BGA integrated circuit pin identification, mainly including CPU FLASH, power chip, intermediate frequency chip, power amplifier and so on. According to the structural design, their packaging methods are also different. There are two main packaging methods in mobile phones:
1. BGA (Ball Grid Array Packag@ball grid array package: it has the advantages of high integration, many pins, and good heat dissipation.
2. PLCC (Plastic Leaded Chip Carrir Flat Package: It has the advantages of easy installation and so on.
1. BGA pin identification
The BGA pin position determination is more complicated, and it is an important content for maintenance personnel. If you don’t know how to identify the pins, you can’t measure the fault point. The following is an explanation of the BGA pads and chips respectively as shown in the figure:
The picture above shows the BGA pad on the mainboard of the mobile phone. Pay attention to the triangle mark in the upper left corner, which is the mark point to identify the pin. Starting from this mark point, the counterclockwise row is A, B. C, D, E, Firi-arranged in order, but there is no 1, 0.Q, S, x, z in the letters, if it is 1, then Just get rid of 1 and use J to extend it. The marking points are 1, 2. 3.4, 5. 6ji-arranged in a clockwise row. If the letters are not finished until Y, then the letters can be extended to AA, AB, ACi-i- and so on. If it is a BGA chip, we also need to find the marker point. As shown in the red circle position, according to the judgment method of the above pad, we can analyze it, counterclockwise is 1, 2, 3.4, 5ii-, clockwise is A, B, C.D. Ei-i- As shown in the figure:
2.PLCC pin identification It is relatively simple to determine the pin position of the PLCC package. Just find the mark point first, and then count the pins counterclockwise from the mark point. As shown in the figure:
BGA packaging technology of Process flow
The substrate or intermediate layer is a very important part of the BGA package. In addition to being used for interconnect wiring, it can also be used for impedance control and for the integration of inductors/resistors/capacitors. Therefore, the substrate material is required to have a high glass transition temperature rS (about 175~230°C), high dimensional stability and low moisture absorption, and good electrical properties and high reliability. The metal film, the insulating layer and the substrate medium also have high adhesion performance.
1.The packaging process of wire bonding PBGA
① Preparation of PBGA substrate
Very thin (12~18μm thick) copper foils are laminated on both sides of the BT resin/glass core board, followed by drilling and through-hole metallization. Patterns, such as conduction strips, electrodes, and pad arrays for mounting solder balls, are produced on both sides of the substrate using conventional PCB technology. A solder mask is then applied and patterned to expose the electrodes and pads. To improve production efficiency, a single substrate usually contains multiple PBG substrates.
② Packaging process
Wafer Thinning → Wafer Cutting → Die Bonding → Plasma Cleaning → Wire Bonding → Plasma Cleaning → Mold Packaging → Solder Ball Assembly → Reflow Soldering → Surface Marking → Separation → Final Inspection → Test Bucket Packaging
Chip bonding uses silver-filled epoxy adhesive to bond the IC chip to the substrate, and then uses gold wire bonding to connect the chip and the substrate, followed by molding and encapsulation or liquid glue potting to protect the chip and bonding wires and pads. Solder balls 62/36/2Sn/Pb/Ag or 63/37/Sn/Pb with a melting point of 183°C and a diameter of 30mil (0.75mm) are placed on the pads using a specially designed pick-up tool. For reflow soldering in a reflow oven, the maximum processing temperature cannot exceed 230°C. The substrates are then centrifuged using CFC inorganic cleaners to remove solder and fiber particles remaining on the package, followed by marking, separation, final inspection, testing, and packaging. The above is the packaging process of the wire-bonded PBGA.
2.The packaging process of FC-CBGA
① Ceramic substrate
The substrate of FC-CBGA is a multilayer ceramic substrate, and its fabrication is quite difficult. Because the wiring density of the substrate is high, the pitch is narrow, there are many through holes, and the coplanarity of the substrate is required to be high. Its main process is: first co-firing multi-layer ceramic sheets at high temperature into a multi-layer ceramic metallized substrate, then making multi-layer metal wiring on the substrate, and then performing electroplating. In the assembly of CBGA, the CTE mismatch between the substrate, the chip and the PCB board is the main factor that causes the failure of the CBGA product. To improve this situation, in addition to the CCGA structure, another ceramic substrate – HITCE ceramic substrate can be used.
② Packaging process
Wafer Bumping Preparation -> Wafer Cutting -> Chip Flip Chip and Reflow Soldering -> Underfill Thermal Grease, Distribution of Sealing Solder -> Capping -> Solder Ball Assembly -> Reflow Soldering -> Marking -> Separation -> Final Inspection -> Test -> Packaging
3.The packaging process of wire bonding TBGA
① TBGA carrier tape
The carrier tape of TBGA is usually made of polyimide material.
During production, copper cladding is first performed on both sides of the carrier tape, then nickel and gold plating, and then through holes and through holes are metallized and patterned. Because in this wire-bonded TBGA, the package heat sink is the reinforcement of the package and the core cavity base of the package, so the carrier tape must be bonded to the heat sink with a pressure-sensitive adhesive before packaging.
② Packaging process
Wafer Thinning → Wafer Cutting → Die Bonding → Cleaning → Wire Bonding → Plasma Cleaning → Liquid Encapsulant Potting → Solder Ball Assembly → Reflow Soldering → Surface Marking → Separation → Final Inspection → Testing → Packaging
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